Fixed-work FPGA design bounds two occupancy steps, not the full pipeline

For camera-based occupancy perception, a low average latency can hide frames that arrive too late to inform braking. It remains unclear whether a deployed system can make part of its computation predictable and still deliver outputs when raw inference timing varies.

The answer matters here because the deadline guarantee and the quality of the occupancy prediction are separate properties.

FALCON moves two fixed-geometry operations to cycle-bounded FPGA hardware and uses a watchdog to deliver an output, even if it must reuse a flagged older prediction.

The board scored 29.88 mIoU on the full Occ3D-nuScenes validation set, compared with 31.43 for a simulation matched to its deployed INT8 configuration.

This score measures overlap between predicted and annotated occupied space. Separately, a watchdog delivered every output in three 100,000-frame runs of a six-inference fixed-work proxy within 100 ms plus at most 10.2 ms.

The paired score comparison shows a small gap to the matched reference, while the proxy runs show that late outputs can still be delivered within a measured envelope. Neither result bounds the full network's inference time: the watchdog may send a flagged older prediction when a frame is late.

The 100 ms delivery result comes from a fixed-work proxy, not the full occupancy pipeline, which takes about 1.3 seconds per frame on the board. The study replays data on hardware rather than testing a moving vehicle, and a late-frame fallback can miss an object first visible in that frame.